Semiconductor chips are tested for defects after their fabrication and before sale or installation in an optoelectronic module. In one known method of testing, a laser chip is mounted to a submount/heat sink, the chip-on-submount assembly is bonded to a metal stud to facilitate handling, the chip-on-submount assembly with its stud is mounted in a temperature controlled environment and the chip is contacted with electrodes carrying electrical current to perform a purge test. In that test method, those operations are performed by human operators.
That known approach to testing of semiconductor chips has considerable disadvantages. Because each semiconductor chip is tested individually, the testing is time consuming and costly. Moreover, because semiconductor chips are tested by a human operator, the quality and consistency of the testing, and, in particular, the thermal contact of the chip and submount/heat sink and the electrical contact of chip and the electrodes, vary greatly and depend on the ability of the operator. Thus, there exists a need in the art for an efficient, automated method and apparatus for consistently and reliably testing semiconductor chips without dependence on consistency of a human operator.